{"id":1687,"date":"2024-10-31T06:00:47","date_gmt":"2024-10-31T06:00:47","guid":{"rendered":"http:\/\/localhost:8080\/rulebreakers-revolutions-ddr5-validation-in-diverse-market\/"},"modified":"2026-06-18T06:36:57","modified_gmt":"2026-06-18T06:36:57","slug":"rulebreakers-revolutions-ddr5-validation-in-diverse-market","status":"publish","type":"post","link":"https:\/\/news.skhynix.com\/en\/rulebreakers-revolutions-ddr5-validation-in-diverse-market\/","title":{"rendered":"[Rulebreakers\u2019 Revolutions] How SK hynix\u2019s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market"},"content":{"rendered":"

\"\"<\/p>\n

Challenging convention, defying limits, and aiming for the skies, rulebreakers remake the rules in their quest to come up with groundbreaking solutions to problems. Following on from SK hynix\u2019s \u201cWho Are the Rulebreakers?<\/span><\/a>\u201d brand film, this series showcases the company\u2019s various \u201crulebreaking\u201d innovations that have reshaped technology and redefined new industry standards. This fourth episode covers the vital role validation has played in the advancement of the company\u2019s DDR5 DRAM lineup.<\/div>\n

SK hynix broke new technological ground to achieve the recent landmark development of the world\u2019s first DDR5* <\/sup> product built using the 1c* <\/sup> node<\/span><\/a>. Boasting improved operating speed and power efficiency compared to the previous generation, the 16 gigabit (Gb) 1c DDR5 represents a monumental leap forward in DRAM process technology.<\/p>\n

* <\/sup>Double Data Rate 5 (DDR5):\u00a0A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.
\n* <\/sup>1c: The sixth generation of the 10 nm DRAM process technology, which was developed in the order of 1x-1y-1z-1a-1b-1c.<\/p>\n

The groundbreaking achievement is just the latest in a long line of breakthroughs by the company to advance its DDR5 lineup. This remarkable progress is not only a testament to SK hynix\u2019s technological prowess but also to its innovative approach to the validation process.<\/p>\n

This episode of\u00a0Rulebreakers\u2019 Revolutions<\/span><\/a> will focus on how the company\u2019s differentiated validation strategy is enabling it to navigate the challenges posed by a diversifying server CPU market, contributing to SK hynix\u2019s DRAM leadership including its cutting-edge DDR5 server DRAM.<\/p>\n

\"[Rulebreakers\u2019<\/p>\n

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The Mission: Strengthening Validation in an Increasingly Diverse CPU Market<\/h3>\n
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SK hynix has faced various challenges throughout the successful development of its latest 1bnm and 1cnm DDR5 products. As each generation of DDR5 is based on a new DRAM process technology, a rigorous validation process is required to ensure the products\u2019 performance and reliability as well as their compatibility with customer systems. This means that the company has had to continually adapt and strengthen its approach to validation for next-generation technologies.<\/p>\n

In addition to validating new technologies, SK hynix also had to respond to the growing diversity of server CPU suppliers in the market. Traditionally, Intel has dominated the sector which has resulted in semiconductor companies primarily focusing their efforts on validating their products with the U.S. tech giant. However, while Intel still leads the sector, AMD and Arm-based suppliers are gradually increasing their market share, especially in cloud and specialized workloads, creating a more fragmented server CPU landscape.<\/p>\n

Amid these shifting market dynamics, SK hynix is required to ensure its DDR5 products\u2019 compatibility and reliability across a broader range of server CPU architectures. This is because CPU companies integrate their chips into a wide range of hardware, placing greater pressure to ensure compatibility with various server CPU types, which is essential for DDR5\u2019s widespread adoption. In particular, early alignment with customers during the product planning stage is increasingly important to meet the needs of various companies and handle numerous server CPU types.<\/p>\n

Faced with the challenge of validating new technologies in a diversifying server CPU market, SK hynix is consistently refining its validation methods to ultimately solidify its leadership in the server DRAM field.<\/p>\n

\"SK<\/p>\n

\u25b2 SK hynix employs a differentiated validation approach to ensure DDR5\u2019s comparability with various server CPUs<\/p>\n

\u00a0<\/strong><\/p>\n

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Compatibility, Collaboration, & Customized Testing: Three Cs Key to Optimized Validation<\/h3>\n
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Although SK hynix had an established validation procedure for its products, the company has adjusted its process for the latest DDR5 products. Typically, validation begins in the pre-development stage by verifying that the design meets the specifications required by server customers and adheres to JEDEC* <\/sup> standards. The company then prepares memory validation samples in collaboration with external partners and aligns the test environment with SoC* <\/sup>\u00a0companies, which play a key role in validation. While CPU companies are the customers for DDR5, SoC companies provide reputable third-party validation to verify the product\u2019s readiness for real-world system application. Continuing with the validation process, the next stage involves internal testing to identify and resolve any defects. The samples are then sent to SoC companies for further tests to complete the process.<\/p>\n

*<\/span> JEDEC Solid State Technology Association: With over 350 member companies, JEDEC is the global leader in developing open standards for the microelectronics industry.
\n*<\/span> System-on-chip (Soc): An integrated circuit that combines all the components of an electronic device onto a single chip.<\/p>\n

For its recent DDR5 products, however, the company is taking a rulebreaking approach to validation that sets it apart from the rest of the field. This unique method is highlighted in the ongoing validation process for the 1bnm and 1cnm DDR5, which features several differentiated strategies.<\/p>\n

For example, to ensure compatibility with a wide range of server CPUs, SK hynix is conducting validation on a wide range of systems\u2014even those that have yet to be released. This involves close collaboration with SoC companies to discuss required technologies and perform co-validation, ensuring that potential issues with samples are addressed early in the development process.<\/p>\n

As well as working with external SoC companies, SK hynix is also conducting improved internal collaboration throughout the validation process to enhance the completeness of the 1c DDR5. Departments responsible for process, design, and testing are closely working together to ensure the cost efficiency of test infrastructure and optimize the sample management and testing process. Moreover, the departments are identifying and improving potential defects in advance through rigorous simulation and aging tests, thereby securing the product\u2019s reliability and stability.<\/p>\n

Another key step in the validation process involves the development of customer-specific tests based on tailored validation scenarios. Recognizing that each customer has different requirements and various products, SK hynix evaluates and verifies various scenarios at the scale and volume testing stages. By predicting potential defects under actual usage conditions, the company aims to ensure that the 1c DDR5 performs reliably across a wide range of applications and platforms.<\/p>\n

\"SK<\/p>\n

\u25b2 SK hynix\u2019s validation strategy involves ensuring broad compatibility, internal collaboration, and customized testing<\/p>\n

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Validation: The Final Piece of the DDR5 Evolution Puzzle<\/h3>\n
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Since SK hynix launched the world\u2019s first DDR5 DRAM in 2020<\/span><\/a>, rapid and reliable validation has played a crucial role in the company\u2019s outstanding progress in the field. The company\u2019s numerous milestones in DDR5 and DRAM scaling technology include the industry-first validation of its 1anm DDR5 with the 4th Gen Intel\u00ae Xeon\u00ae Scalable processor<\/span><\/a> in January 2023. In May of the same year, the company announced it had developed the industry\u2019s most advanced 1bnm DDR5 and begun validation with Intel<\/span><\/a>.<\/p>\n

While the semiconductor industry has faced increasing difficulty in advancing the 10 nm process technology, SK hynix overcame the obstacles thanks in part to its robust validation strategy. This is set to continue with the validation of its 1c DDR5 product, which aims to verify key specifications of the new DRAM.<\/p>\n

\"The<\/p>\n

\u25b2 The 1c DDR5 offers superior operating speeds and power efficiency compared to the previous generation<\/p>\n

In comparison to 1b DDR5, the 1c DDR5 product offers 11% faster operating speeds of 8 gigabits (Gbps) per second and a more than 9% improvement in power efficiency. As part of the validation process which is progressing smoothly, SK hynix is currently working with server CPU suppliers to verify the product\u2019s stable performance and ensure it meets the expected operational standards.<\/p>\n

Looking ahead, the successful development of 1c DDR5 has established a benchmark for subsequent DRAM product lines to be developed with the 1c node, including HBM* <\/sup>, LPDDR* <\/sup>, and GDDR* <\/sup>.\u00a0In terms of validation, the company is striving to enhance the efficiency and overall process for future products. In particular, the company aims to reduce risk factors in future validation processes, ensuring higher quality and reliability for its next-generation products.<\/p>\n

*<\/span> High Bandwidth Memory (HBM): A high-value, high-performance product that possesses much higher data processing speeds compared to existing DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV).
\n*<\/span> Low Power Double Data Rate (LPDDR): A line of low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation.
\n*<\/span> Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.<\/p>\n

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Rulebreaker Interview: Yoosung Lee, DRAM Server Product Planning<\/h3>\n
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\"Rulebreaker<\/p>\n

To find out more about the company\u2019s innovative approach to validation, the SK hynix Newsroom spoke with Technical Leader (TL) Yoosung Lee of DRAM Server Product Planning. Lee\u2019s department plays a key role in collaborating with customers such as SoC companies to validate products. He discussed how the company encourages employees to take a different approach to their work and the improvement plans for validation.<\/p>\n

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How do you believe the company is motivating team members to strive for rulebreaking achievements, such as the goal of validating 1c DDR5?<\/strong>
\n\u201cWe prioritize recognizing and rewarding the process rather than solely focusing on outcomes. Rulebreaking isn\u2019t always about bold, instant breakthroughs. It\u2019s often the quiet persistence\u2014the repetition, fine-tuning, and seamless collaboration\u2014that lays the foundation for true innovation.
\n\u201cIn addition, we offer a range of educational opportunities, including AI technology training and seminars, to ensure our team members stay informed about market trends and technological advancements.\u201d<\/p>\n
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How do you foresee the future validation of 1cnm DDR5 impacting the validation process of next-generation products?<\/strong>
\n\u201cWhen completed, the validation of the 1cnm DDR5 is expected to set a benchmark for subsequent products built on 1cnm technology. This achievement is likely to streamline the validation process for future products by verifying their quality upfront, thereby mitigating potential risks and enhancing reliability across the board.
\n\u201cAs 1cnm technology has just taken its first steps, continuous validation is necessary to ensure the stable supply of products to all customers in the future. We are currently supplying samples for validation with both already-released CPUs and those that will be released in the future, and we plan to continue supplying these samples.\u201d<\/p>\n

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\"Yoosung<\/p>\n

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How does SK hynix plan to enhance its validation process?<\/strong>
\n\u201cTo make the validation process more efficient, we aim to build a system that achieves maximum results with minimal resources. To achieve this, we plan to strengthen collaboration with SoC companies and propose and discuss various validation strategies.
\n\u201cAdditionally, to respond quickly to plan changes and urgent sample requests, we will work with relevant departments to identify and improve any necessary elements in the sample production process.
\n\u201cOverall, our strategy is to be proactive, not reactive, by responding to the market without resting on our laurels.\u201d<\/p>\n<\/div>\n

Read more articles from the Rulebreakers\u2019 Revolutions series<\/a><\/span><\/p>\n


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Challenging convention, defying limits, and aiming for the skies, rulebreakers remake the rules in their quest to come up with groundbreaking solutions to problems. Following on from SK hynix\u2019s \u201cWho Are the Rulebreakers?\u201d brand film, this series showcases the company\u2019s various \u201crulebreaking\u201d innovations that have reshaped technology and redefined new industry standards. This fourth episode [\u2026]<\/p>\n","protected":false},"author":23,"featured_media":7538,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_migrated_source_id":16091,"footnotes":"","_members_access_role":[],"_members_access_error":""},"categories":[5],"tags":[199,925,475,782,906],"class_list":["post-1687","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tech-and-ai","tag-1c-ddr5","tag-cpu","tag-rulebreakers-revolutions","tag-server-dram","tag-validation","series-rulebreakers-revolutions"],"acf":[],"_links":{"self":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/1687","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/users\/23"}],"replies":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/comments?post=1687"}],"version-history":[{"count":16,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/1687\/revisions"}],"predecessor-version":[{"id":7242,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/1687\/revisions\/7242"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media\/7538"}],"wp:attachment":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media?parent=1687"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/categories?post=1687"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/tags?post=1687"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}