{"id":2053,"date":"2024-04-25T05:00:28","date_gmt":"2024-04-25T05:00:28","guid":{"rendered":"http:\/\/localhost:8080\/sk-hynix-strengthens-ai-memory-leadership-and-partnerships-at-tsmc-2024-tech-symposium\/"},"modified":"2026-06-11T18:13:57","modified_gmt":"2026-06-11T18:13:57","slug":"sk-hynix-strengthens-ai-memory-leadership-and-partnerships-at-tsmc-2024-tech-symposium","status":"publish","type":"post","link":"https:\/\/news.skhynix.com\/en\/sk-hynix-strengthens-ai-memory-leadership-and-partnerships-at-tsmc-2024-tech-symposium\/","title":{"rendered":"SK hynix Strengthens AI Memory Leadership & Partnership With Host at the TSMC 2024 Tech Symposium"},"content":{"rendered":"
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\u25b2 SK hynix\u2019s booth at the TSMC 2024 Technology Symposium<\/p>\n

SK hynix showcased its next-generation technologies and strengthened key partnerships at the TSMC 2024 Technology Symposium held in Santa Clara, California on April 24. At the event, the company displayed its industry-leading HBM* <\/sup> AI memory solutions and highlighted its collaboration with TSMC involving the host\u2019s CoWoS* <\/sup> advanced packaging technology.<\/p>\n

* <\/sup>High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).
\n* <\/sup>Chip on Wafer on Substrate (CoWoS): TSMC\u2019s proprietary packaging technology to combine HBMs and GPUs. Unlike conventional packaging that connects different chips\u2014such as memory and logic chips\u2014on a substrate after they are packaged separately, CoWoS simultaneously packages the chips together on a silicon-based interposer. The area decreases as the distance between chips reduces, and the signal transmission speed increases as more wiring becomes possible.<\/p>\n

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\u25b2 HBM3E is the ideal memory solution for AI applications<\/p>\n

TSMC, a global semiconductor foundry, invites its major partners to this annual conference in the first half of each year so they can share their new products and technologies. Attending the event under the slogan \u201cMemory, the Power of AI,\u201d SK hynix received significant attention for presenting the industry\u2019s most powerful AI memory solution, HBM3E. The product has recently demonstrated industry-leading performance, achieving input\/output (I\/O) transfer speed of up to 10 gigabits per second (Gbps) in an AI system during a performance validation evaluation.<\/p>\n

SK hynix also operated a collaboration zone with the host company to emphasize the importance of cooperating with TSMC in the area of CoWoS to solidify its HBM leadership. The display follows the two companies\u2019 recent announcement that they will establish a closer and more innovative partnership to develop new technologies<\/span><\/a> such as next-generation HBM products.<\/p>\n

\"SK<\/p>\n

\u25b2 SK hynix displayed a range of leading solutions for the AI sector<\/p>\n

In addition to its HBM solutions, SK hynix also displayed a range of its high-performance products that are set to supplement the AI industry. The lineup included CXL* <\/sup> memory with an integrated interface, MCR DIMM* <\/sup> and 3DS RDIMM* <\/sup> memory modules for servers, LPCAMM2* <\/sup> and LPDDR5T* <\/sup> optimized for on-device AI, and the next-generation graphic DRAM GDDR7.<\/p>\n

* <\/sup>Compute Express Link (CXL): A PCIe-based next-generation interconnect protocol on which high-performance computing systems are based.
\n* <\/sup>Multiplexer Combined Ranks Dual In-line Memory Module (MCR DIMM): A module product with multiple DRAMs bonded to a motherboard in which two ranks\u2014basic information processing units\u2014operate simultaneously, resulting in improved speed.
\n* <\/sup>3D Stacked Memory Registered Dual In-line Memory Module (3DS RDIMM): A high-density memory module used in servers and other applications to vertically connect DRAM dies through TSV, reducing module package height and boosting data transfer speeds.
\n* <\/sup>Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that offers power efficiency and high performance as well as space savings. It has the performance effect of replacing two existing DDR5 SODIMMs with one LPCAMM2.
\n* <\/sup>Low Power Double Data Rate 5 Turbo (LPDDR5T): Low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation. LPDDR5T is an upgraded product of the 7th generation LPDDR5X and will be succeeded by the 8th generation LPDDR6.<\/p>\n

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\u25b2 SK hynix\u2019s Unoh Kwon and Jaesik Lee presenting at a workshop<\/p>\n

In a workshop held two days before the TSMC 2024 Technology Symposium, Head of HBM PI Unoh Kwon and Head of Package Engineering Jaesik Lee presented their talk titled \u201cHBM and Heterogeneous Integrated Technology.\u201d As seen through its active participation in the symposium, SK hynix plans to strengthen its AI memory competitiveness by advancing its partnerships in various areas including technology, business, and trends.<\/p>\n","protected":false},"excerpt":{"rendered":"

SK hynix\u2019s booth at the TSMC 2024 Technology Symposium \u00a0 SK hynix showcased its next-generation technologies and strengthened key partnerships at the TSMC 2024 Technology Symposium held in Santa Clara, California on April 24. At the event, the company displayed its industry-leading HBM1 AI memory solutions and highlighted its collaboration with TSMC involving the host\u2019s [\u2026]<\/p>\n","protected":false},"author":23,"featured_media":2045,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_migrated_source_id":14876,"footnotes":"","_members_access_role":[],"_members_access_error":""},"categories":[5],"tags":[12,14,221,13,36,37,1320,471],"class_list":["post-2053","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tech-and-ai","tag-ai","tag-ai-memory","tag-cowos","tag-hbm","tag-hbm3e","tag-tsmc","tag-tsmc-2024-tech-symposium","tag-tsmc-technology-symposium"],"acf":[],"_links":{"self":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2053","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/users\/23"}],"replies":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/comments?post=2053"}],"version-history":[{"count":2,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2053\/revisions"}],"predecessor-version":[{"id":8514,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2053\/revisions\/8514"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media\/2045"}],"wp:attachment":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media?parent=2053"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/categories?post=2053"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/tags?post=2053"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}