{"id":2259,"date":"2023-12-11T06:00:16","date_gmt":"2023-12-11T06:00:16","guid":{"rendered":"http:\/\/localhost:8080\/semiconductor-back-end-process-episode-10-roles-of-materials-in-wafer-level-packaging\/"},"modified":"2026-06-11T22:05:29","modified_gmt":"2026-06-11T22:05:29","slug":"semiconductor-back-end-process-episode-10-roles-of-materials-in-wafer-level-packaging","status":"publish","type":"post","link":"https:\/\/news.skhynix.com\/en\/semiconductor-back-end-process-episode-10-roles-of-materials-in-wafer-level-packaging\/","title":{"rendered":"Semiconductor Back-End Process Episode 10: Exploring the Roles of Materials in Wafer-Level Semiconductor Packaging"},"content":{"rendered":"<p>Following the <a href=\"https:\/\/news.skhynix.com\/semiconductor-back-end-process-episode-9-roles-of-materials-in-conventional-packaging\/\" target=\"_blank\" rel=\"noopener noreferrer\"><span style=\"text-decoration: underline;\">previous episode<\/span><\/a> which covered the materials that make up conventional packages, this article will examine the various materials used in wafer-level packaging (WLP). From the resin in a photoresist to the adhesive in a wafer support system (WSS), the various WLP materials play vital roles which will be explored throughout this penultimate installment of the series.<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Photoresists (PR): Sensitizers, Resins, &amp; Solvents Create Patterns &amp; Barriers<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>Photoresists are compounds formed from melting soluble polymers and photosensitive materials\u2014which undergo a chemical reaction such as degradation or fusion when exposed to light energy\u2014in a solvent. They are used to create the intended pattern during photolithography in WLP, while they also serve as a barrier by plating metal wiring during the subsequent electroplating<sup style=\"color: #ff0000;\">* <\/sup> process. The materials that make up a photoresist can be found below in Figure 1.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Electroplating: A reaction where oxidation occurs at the positive plate to produce electrons which are transmitted to a wafer with a solution that has metal ions. These metal ions are negative plates that become metal.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-13523 size-medium\" title=\"The components and roles of photoresists\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2026\/05\/27154853\/SK-hynix_Back-End-Process-EP10_EN_01-680x290-1.png\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" alt=\"The components and roles of photoresists\" width=\"1000\" height=\"427\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 1. The components and roles of photoresists (Source: Hanol Publishing)<\/p>\n<p>A photoresist is classified as positive or negative depending on how it responds to light. In a positive photoresist, the areas exposed to light undergo degradation which weakens the bonding, while unexposed areas experience cross-linking<sup style=\"color: #ff0000;\">* <\/sup> that strengthens the bonds. Therefore, areas that have received light are removed during the development process. However, in the case of negative photoresists, the areas that are exposed to light experience cross-linking and harden, leading them to remain intact while unexposed areas are removed. As negative photoresists can be applied more thickly during the spin coating process as they tend to have a higher viscosity than positive photoresists, they are usually used when forming higher solder bumps. On the other hand, positive photoresists need to be applied at least two times.<\/p>\n<p>The light used during photolithography can be classified according to its wavelength, which is measured in nanometers (nm). Light with shorter wavelengths has been used during photolithography to form finer patterns for semiconductors that have gone through scaling, leading to the enhancement of photoresists. Accordingly, photoactive compounds (PAC) are used for g-line<sup style=\"color: #ff0000;\">* <\/sup> and i-line<sup style=\"color: #ff0000;\">* <\/sup> photoresists with longer wavelengths, while chemically amplified resists (CAR)<sup style=\"color: #ff0000;\">* <\/sup> are used for photoresists with shorter wavelengths. As for WLPs, they typically use i-line steppers<sup style=\"color: #ff0000;\">* <\/sup>.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Cross-link: A chemical reaction that links polymer chains through chemical bonds.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>g-line: A line of the mercury spectrum corresponding to a wavelength of about 436 nm.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>i-line: A line of the mercury spectrum corresponding to a wavelength of about 356 nm.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>Chemically amplified resists (CAR): A resist used to improve the photosensitivity of photoresist materials.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>Stepper: Equipment used to expose wafers. Different types of equipment are used for wafer exposure with varying degrees of accuracy depending on the type of light used.<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Plating Solutions: Metal Ions, Acids, &amp; Additives For Controlled Electroplating<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>Plating solutions are used during electroplating. These solutions are comprised of metal ions to be plated during the electroplating process, acids that become solvents to dissolve metal ions in the solutions, and various additives that enhance the properties of the plating solution and plating layer. Some metals that can be plated during the electroplating process include nickel, gold, copper, tin, and tin\/silver alloy. These metals exist as ions inside the plating solution. For solvents, some commonly used acids include sulfuric acid and methanesulfonic acid. Meanwhile, the additives include levelers which limit the buildup of materials and flatten the surface of the plating layer, and grain refiners that prevent the lateral growth of plating grains so they become finer as they grow.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-13524 size-medium\" title=\"The roles of plating solution additives\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2026\/05\/27154859\/SK-hynix_Back-End-Process-EP10_EN_02-376x400-1.png\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" alt=\"The roles of plating solution additives\" width=\"1000\" height=\"1063\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 2. The roles of plating solution additives (Source: Hanol Publishing)<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Photoresist Strippers: Using Solvents to Remove Without a Trace<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>After the plating process is finished, the photoresist needs to be removed with a photoresist stripper without chemically damaging the wafer or leaving any residue. Figure 3 shows this process of removing a photoresist. First, the solvent of the photoresist stripper reacts when it contacts the photoresist surface, which starts to swell up. Then, the alkaline stripper breaks down and dissolves the swollen photoresist surface.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-13525 size-medium\" title=\"The sequence of a photoresist stripper removing a photoresist\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2026\/05\/27154904\/SK-hynix_Back-End-Process-EP10_EN_03-520x400-1.png\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" alt=\"The sequence of a photoresist stripper removing a photoresist\" width=\"1000\" height=\"769\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 3. The sequence of a photoresist stripper removing a photoresist (Source: Hanol Publishing)<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Etchants: Using Acids, Hydrogen Peroxide &amp; More to Precisely Dissolve Metals<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>WLP requires a sputtering<sup style=\"color: #ff0000;\">* <\/sup> process to create a seed layer, a thin layer of sputtered or evaporated metal, for electroplating. This seed layer needs to be dissolved with an acid etchant after the completion of plating and photoresist stripping.<\/p>\n<p>Figure 4 displays the primary components and roles of etchants. Depending on the metal to dissolve, copper etchants, titanium etchants, silver etchants, and other etchants are used. Such etchants should possess etch selectivity\u2014the capability to selectively dissolve certain metals while leaving others undissolved or just slightly dissolved. They also should have a high etch rate to enhance the process efficiency, as well as process uniformity which enables the etchant to dissolve the metal at a uniform rate regardless of the metal\u2019s location on the wafer.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Sputtering: A type of physical vapor deposition (PVD) in which high-energy ions are bombarded against a metal target, enabling the ejected metal ions to be deposited onto the wafer surface.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-13526 size-medium\" title=\"The main components and roles of etchants\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2026\/05\/27154909\/SK-hynix_Back-End-Process-EP10_EN_04-455x400-1.png\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" alt=\"The main components and roles of etchants\" width=\"1000\" height=\"880\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 4. The main components and roles of etchants (Source: Hanol Publishing)<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Sputtering Targets: Depositing Metal Onto a Substrate<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>A sputtering target is used as a material when a thin metal film is deposited on a wafer with the sputtering method during the physical vapor deposition (PVD)<sup style=\"color: #ff0000;\">* <\/sup> process. Figure 5 shows the process of how this target is fabricated. A cylinder is created using raw materials which have the same composition as the metal layer that is going to be sputtered, and then it is forged, pressed, heated treated, and finally shaped into a target.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Physical vapor deposition (PVD): As one of the ways to deposit thin films, PVD physically separates and deposits a material on a surface.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"aligncenter wp-image-13527 size-medium\" title=\"The process of fabricating a sputtering target\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2026\/05\/27154913\/SK-hynix_Back-End-Process-EP10_EN_05-563x400-1.png\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" alt=\"The process of fabricating a sputtering target\" width=\"1000\" height=\"711\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 5. The process of fabricating a sputtering target (Source: Hanol Publishing)<\/p>\n<p><strong>Underfills: Filling Holes With EMC, Pastes, &amp; Film for Joint Protection<\/strong><br \/>\nUnderfills enhance joint reliability by filling spaces between the substrate and the chip or between chips that are connected by bumps just as in flip chip bonding. There are two main underfill processes that fill up the spaces between bumps. Post-filling fills the space between bumps after flip chip bonding, while pre-applied underfill fills the material before it. Furthermore, post-filling is further divided into capillary<sup style=\"color: #ff0000;\">* <\/sup> underfill (CUF) and molded underfill (MUF). After flip chip bonding is applied, CUF fills in the gaps between bumps by using a capillary to inject underfill material into the side of the chip. This adds surface tension within the gap between the chip and the substrate. As for MUF, it allows epoxy molding compound (EMC)<sup style=\"color: #ff0000;\">* <\/sup> to function as an underfill during molding and simplifies the process.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Capillary: A very thin tube used to transfer the liquid encapsulant material into the semiconductor package.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>Epoxy Molding Compound (EMC): A composite of inorganic silica and a thermosetting epoxy polymeric material that creates three-dimensional bonds when heated.<\/p>\n<p>During the pre-applied underfill process, the underfill is applied differently based on whether it is carried out at the chip level or at the wafer level. For the chip level, different processes and materials are used depending on whether the joints are filled with non-conductive paste (NCP) or non-conductive film (NCF). For the wafer level, NCF is primarily used as the underfill. Figure 6 shows the types of materials used for underfill and the relevant processes.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-full wp-image-7628\" src=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2023\/12\/SK-hynix_Back-End-Process-EP10_EN_06.png.png\" alt=\"\" width=\"1000\" height=\"916\" srcset=\"https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2023\/12\/11054801\/SK-hynix_Back-End-Process-EP10_EN_06.png.png 1000w, https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2023\/12\/11054801\/SK-hynix_Back-End-Process-EP10_EN_06.png-300x275.png 300w, https:\/\/d18r0a86za96sg.cloudfront.net\/wp-content\/uploads\/2023\/12\/11054801\/SK-hynix_Back-End-Process-EP10_EN_06.png-768x703.png 768w\" sizes=\"auto, (max-width: 1000px) 100vw, 1000px\" \/><\/p>\n<p class=\"caption\">\u25b2 Figure 6. The different types of underfill processes (Source: Hanol Publishing)<\/p>\n<p>The underfill material is a vital component to guarantee the reliability of joints in processes like flip chip and chip stacking using through-silicon via (TSV). Accordingly, the material needs to meet specific requirements for cavity filling, interfacial adhesion, coefficient of thermal expansion<sup style=\"color: #ff0000;\">* <\/sup>, thermal conductivity, and thermal resistance.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Coefficient of thermal expansion (CTE): A material property that indicates the extent to which a material expands upon heating.<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">Wafer Support System: Using a Carrier, TBA, &amp; Mounting Tape to Assemble the Package<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>The wafer support system (WSS) process requires a carrier that can support a thin wafer and a temporary bonding adhesive (TBA). After debonding the carrier, mounting tape is also required to firmly attach the thin wafer that formed bumps on its front and back to a ring frame.<\/p>\n<p>Among all the materials that are involved in a WSS, the TBA is the most important. When the wafer and carrier are bonded together to form a TSV package, the TBA must maintain strong adhesion during the backside process without damaging the bumps on the wafer. Thus, there must be no outgassing<sup style=\"color: #ff0000;\">* <\/sup>, voids<sup style=\"color: #ff0000;\">* <\/sup>, delamination<sup style=\"color: #ff0000;\">* <\/sup>, and bleeding out\u2014the seeping out of adhesive from the sides of the wafer during bonding. Consequently, it is crucial to have both thermal stability and chemical resistance, while the carrier must also be easy to remove without leaving any residue.<\/p>\n<p class=\"footnote\"><sup style=\"color: #ff0000;\">* <\/sup>Outgassing: The release of a gas from a liquid or solid material. This gas can cause defects in semiconductor devices if it condenses on a surface and affects the device\u2019s properties.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>Voids: A gap in a material caused by the formation of air bubbles. These voids can expand during high-temperature processes or debonding, increasing the risk of damage or device failure.<br \/>\n<sup style=\"color: #ff0000;\">* <\/sup>Delamination: The separation of two previously connected surfaces in a semiconductor package.<\/p>\n<p>Even though silicon carriers are preferred, glass carriers are also frequently used. This is especially true for processes that use light such as lasers during debonding as they require the use of glass carriers.<\/p>\n<p>\u00a0<\/p>\n<div style=\"text-align: center;\">\n<div style=\"display: inline-block; max-width: 748px; width: 100%; text-align: left;\">\n<div style=\"height: 2px; background: #666666; margin-bottom: 6px;\"><\/div>\n<h3 class=\"sub-title\" style=\"margin: 0; line-height: 1.4;\">The Building Blocks of Semiconductor Packaging<\/h3>\n<div style=\"height: 2px; background: #666666; margin-top: 6px;\"><\/div>\n<\/div>\n<\/div>\n<p>Throughout these articles on the materials that make up conventional packaging and WLP, it has become clear that the type and quality of materials have had to evolve to keep pace with the development of semiconductors. The various reliability tests for semiconductor packages will be introduced in the next episode, which will conclude the back-end process series.<\/p>\n<p><span style=\"text-decoration: underline;\"><strong><a href=\"https:\/\/news.skhynix.com\/tag\/front-end-process\/\" target=\"_blank\" rel=\"noopener noreferrer\">Read articles from the Front-End Process series<\/a><\/strong><\/span><\/p>\n<p><span style=\"text-decoration: underline;\"><strong><a href=\"https:\/\/news.skhynix.com\/tag\/back-end-process\/\" target=\"_blank\" rel=\"noopener noreferrer\">Read articles from the Back-End Process series<\/a><\/strong><\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Following the previous episode which covered the materials that make up conventional packages, this article will examine the various materials used in wafer-level packaging (WLP). From the resin in a photoresist to the adhesive in a wafer support system (WSS), the various WLP materials play vital roles which will be explored throughout this penultimate installment [\u2026]<\/p>\n","protected":false},"author":23,"featured_media":2252,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_migrated_source_id":13522,"footnotes":"","_members_access_role":[],"_members_access_error":""},"categories":[5],"tags":[1050,1061,299,1060],"class_list":["post-2259","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-tech-and-ai","tag-back-end-process","tag-packaging-materials","tag-semiconductor","tag-wafer-level-package"],"acf":[],"_links":{"self":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2259","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/users\/23"}],"replies":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/comments?post=2259"}],"version-history":[{"count":3,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2259\/revisions"}],"predecessor-version":[{"id":8548,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/2259\/revisions\/8548"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media\/2252"}],"wp:attachment":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media?parent=2259"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/categories?post=2259"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/tags?post=2259"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}