{"id":4281,"date":"2020-10-29T08:00:00","date_gmt":"2020-10-29T08:00:00","guid":{"rendered":"http:\/\/localhost:8080\/head-of-dram-pe-joohwan-cho-key-person-of-the-development-of-the-worlds-first-40nm-class-2gb-graphic-ddr5\/"},"modified":"2026-07-29T15:02:23","modified_gmt":"2026-07-29T06:02:23","slug":"head-of-dram-pe-joohwan-cho-key-person-of-the-development-of-the-worlds-first-40nm-class-2gb-graphic-ddr5","status":"publish","type":"post","link":"https:\/\/news.skhynix.com\/en\/head-of-dram-pe-joohwan-cho-key-person-of-the-development-of-the-worlds-first-40nm-class-2gb-graphic-ddr5\/","title":{"rendered":"Head of DRAM PE Joohwan Cho, Key Person of the Development of the World\u2019s First 40nm-class 2Gb Graphic DDR5"},"content":{"rendered":"
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A New Attempt for the High-Speed<\/h3>\n
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One day in 2008, the performance test for the graphic DRAM was in full swing at the Design Analysis Office at SK hynix (Hynix Semiconductor Inc. at that time). Joohwan Cho (DRAM PE), who was working hard on research, was the key person of the development and this is the person we will introduce in this article today.<\/p>\n

\u201cGraphic DRAM is a product specialized in \u2018speed\u2019, as it is optimal for fast data processing. If we could develop a high-speed technology for a graphic DRAM, it would mean that we could timely release higher performance products than our competitors, as it can be applied to main memory DRAMs or mobile DRAMs. At that time, SK hynix was also preparing a new graphic DRAM, GDDR5, with a goal of achieving 7Gbps speed (processing 7 gigabit of data per second). It can sound relatively slow when you compare it to the current level, but at that time, it was \u2018SUPEX (Super Excellent)\u2019, which means the highest level that humans can achieve, as a core concept of SK Group\u2019s management. We set the high target like this from the beginning, as a \u2018strategy\u2019 to dominate the DRAM market.\u201d<\/strong><\/p>\n

To achieve \u201c7Gbps\u201d, all existing designs had to be fundamentally changed. For this reason, the design team at that time attempted to apply the \u201c2-Phase Clocking\u201d design technology for the first time in the DRAM industry. \u201cClocking\u201d is a method for synchronizing transmitted and received data during data transmission, and \u201c2-Phase\u201d is a technology that secures a spare time for operation by dividing the frequency. In other words, when comparing it to the water flow, this concept is like making the water flow in two pipelines and then combining two water flows afterwards, while the water flowed through only one pipeline previously.<\/p>\n

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In fact, Joohwan Cho had tried the \u201c2-Phase Clocking\u201d technology for the previous generation, GDDR4, but this did not lead to a great result. For him, GDDR4 meant the pain and a valuable lesson at the same time. Therefore, the success of GDDR5 was something he wanted to achieve and something he had to achieve. Also, as he took on the leader for this project at the relatively earlier stage of his career at that time, his sense of responsibility and his will was greater than anyone else.<\/p>\n

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The World\u2019s first 40nm-class 2 Gigabit Graphic DDR5 Proves the \u201cHigh Position\u201d by Its Market Share<\/h3>\n
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The product that was born after the enormous efforts was the 2 gigabit (Gb) GDDR5 where a 40nm-class process was applied for the first time in the world. This product could process 28 gigabytes (GB) of data per second through 32 input\/output (I\/O), with a processing speed of 7Gbps. The capacity was also doubled compared to the existing 50nm-class 1Gb product, which could meet the demand for high-capacity products. Also, energy consumption has been reduced by 20% compared to the previous one with low power operation of 1.35V.<\/p>\n

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\u25b2 40nm-class 2 gigabit (GB) graphic DDR5 product developed
\nby Hynix Semiconductor (predecessor to SK hynix)<\/p>\n

Graphic DRAM was characterized by its capability of processing a large amount of data at once compared to general-purpose DRAM. GDDR5, which dramatically enhanced processing speed, was optimal for high-end desktops or laptops that required high-resolution and high-speed operation.<\/p>\n

\u201cLike today, early adopters, consumers who tend to purchase and use newly released products than others, used to measure the performance of newly released graphic cards by using various programs and share the results with others. There were many responses that SK hynix\u2019s graphic DRAM was well \u2018overclocked\u2019. Here, overclocking means artificially controlling the chip performance to make it faster than it actually is. Consumer preference was very high in terms of performance as well. This suggests that this product was very competitive.\u201d<\/strong><\/p>\n

Earlier, Hynix Semiconductor had succeeded in developing the world\u2019s first 60nm-class 1Gb GDDR5 in 2007 and 50nm-class 1Gb GDDR5 in 2008, accounting for around 50% of the DRAM market\u2019s share. With the development of the GDDR5 product, it secured a market share of nearly 70% and held an unchallenged position in the high-performance graphic DRAM market whilst leading the market.<\/p>\n

Joohwan Cho, who has contributed to the development of SK hynix by committing himself to DRAM design for 27 years, has been recognized for his various achievements in Korea and other countries. The awards he has received so far include the In-house Year-end General Award, 38nm Graphic Special Award, and the SK Management System (SKMS) Practice Award. In 2015, he was recognized for his contribution to improving technological competitiveness by securing the 30nm-class GDDR5 design technology by receiving the Minister\u2019s Award for the \u201cSemiconductor Day\u201d in Korea. As his career suggests, many products that have gone through his hands, but the 40nm-class 2Gb GDDR5 has always a special meaning to him.<\/p>\n

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\u201cIt was a product that made me realize and reminded me of the fact that we also have the DNA for taking the No.1 ranking and the ability to achieve it. The sense of accomplishment I felt at that time has been motivating me greatly even to this day. I believe that if we take the first place in several fields one by one, we will win the first place in the entire DRAM market. I hope the juniors also remember good precedents like GDDR5 and work with confidence.\u201d<\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"

A New Attempt for the High-Speed One day in 2008, the performance test for the graphic DRAM was in full swing at the Design Analysis Office at SK hynix (Hynix Semiconductor Inc. at that time). Joohwan Cho (DRAM PE), who was working hard on research, was the key person of the development and this is [\u2026]<\/p>\n","protected":false},"author":23,"featured_media":4277,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_migrated_source_id":5972,"footnotes":"","_members_access_role":[],"_members_access_error":""},"categories":[6],"tags":[1219,1218,581,1217],"class_list":["post-4281","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-story","tag-40nm-class-2gb-graphic-ddr5","tag-behind-the-scenes-story","tag-gddr5","tag-minterview"],"acf":[],"_links":{"self":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/4281","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/users\/23"}],"replies":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/comments?post=4281"}],"version-history":[{"count":3,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/4281\/revisions"}],"predecessor-version":[{"id":11941,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/posts\/4281\/revisions\/11941"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media\/4277"}],"wp:attachment":[{"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/media?parent=4281"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/categories?post=4281"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/news.skhynix.com\/en\/wp-json\/wp\/v2\/tags?post=4281"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}