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Bringing Hyperscale onto the Wafers: Photo Technology Team

By September 10, 2021 September 17th, 2021 No Comments
With the increasingly fiercer competition for scaling in the semiconductor industry, the photo process for printing fine circuit patterns on wafers is emerging as one of the most crucial processes. SK hynix is also making efforts to lead technology in this field, by introducing the extreme ultraviolet (EUV) lithography for DRAM mass production.

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With the increasingly fiercer competition for scaling in the semiconductor industry, the photo process for printing fine circuit patterns on wafers is emerging as one of the most crucial processes. SK hynix is also making efforts to lead technology in this field, by introducing the extreme ultraviolet (EUV) lithography for DRAM mass production.

Our newsroom met with the members of the Photo Technology teams under the Manufacturing & Technology unit at SK hynix to have a glimpse of their job and the talents they seek to hire.

Mission: Win Yield, Productivity, and Cost Competitiveness

The top three priorities for semiconductor manufacturing and mass production are yield, productivity, and cost competitiveness. That sums up to a process of providing quality products with strong price competitiveness to customers at a right time. SK hynix’s Manufacturing & Technology unit is striving to constantly improve the three factors to remain the leader of the industry.
The semiconductor memory industry has been focusing on developing scaling technology that decreases the critical dimension (CD) of circuits and stacking semiconductor components to increase storage capacity and improve performance. Such efforts have brought the level of scaling down to 1/10,000 the thickness of a human hair, making further technological advancements challenging. The Moore’s Law that the density of semiconductors doubles every 18 months is believed to be no longer valid.

As a new strategy for scaling, an increasing number of semiconductor memory manufacturers are adopting the EUV lithography technology in the photo process where circuit patterns are printed onto wafers. With a short wavelength of around 13.5 nanometer, EUV equipment demonstrates excellent resolution1, facilitating exposure of fine patterns. Also, by helping streamline the process, it also results in better cost competitiveness.

The Photo Technology teams under SK hynix’s Manufacturing & Technology unit are seeking various options to address the challenges for further scaling. The teams have been working to define a product’s process difficulty and requirement specifications in advance and develop the necessary technologies either on its own or through cooperation with business partners. They also work closely with the R&D division to preemptively reflect any possible challenges to mass production in advance to find a solution at an early time.

For photo process, two teams – Icheon DRAM Track Photo Technology and Scanner Photo Technology Teams – are responsible for securing and maintaining the best conditions for patterning, which is essential for high-quality products.

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The photo process is to imprint an identical shape and size of a designed semiconductor pattern onto a desired location of a wafer. The process mainly comprises of the three steps – photo resist (PR) coating, exposure, and development. The PR coating and development steps involve track equipment, while scanner is used for the exposure process.

The Track Photo Technology Team and Scanner Photo Technology Team are responsible for the operation and improvement of track equipment and exposure equipment, respectively. They’re also responsible for addressing the issues arising from the photo process or equipment.

“No Easy Answers…Curiosity Is the Key”

The newsroom met with the junior members of the Icheon DRAM Track Photo Technology Team and Icheon DRAM Scanner Photo Technology Team to hear about the competencies and qualities required for their work.

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Q. Please tell us about your job.

Young-joo Lee, a Technical Leader at Icheon DRAM Track Photo Technology team: I manage the data measured during the process at the Track Photo Technology Team. Matching the data with the equipment data and identifying the correlation with the sub-processes are also my responsibilities. I am also involved in development of the derivative products.

Sang-gwon Lee, TL at Icheon DRAM Track Photo Technology team: As an engineer of the team, I mainly manage yield, quality, and productivity. I am also responsible for the audits of the fab clients.

 

Q. Could you introduce some competencies your job requires?

Young-joo: Development of a new device is no longer bound to the responsibilities of the R&D division as the Manufacturing & Technology unit is also increasingly involved nowadays, making deep understanding and collaboration with different teams extremely important factors. Good communication skills are a must and a detail-oriented thinking is definitely a plus.

Sang-gwon: A good engineer should be able to handle the response parameter well if he/she is in charge of yield and productivity management. That means the engineer should have a good knowledge of the equipment principles that could affect the response. Also, since manufacturing & technology work cannot be done alone, good communication skills are wanted for collaboration with different teams handling other processes that can affect the photo process.

 

Q. What challenges have you encountered and how did you overcome?

Young-joo: Due to the high level of pattern shrink, managing overlay2 is not easy. Semiconductors have a stacked structure, and managing overlay involves aligning the patterns formed on the upper and lower layers by using scanner equipment and numerically checking and correcting misalignments. We are now developing a system that can manage overlays in the mid- to long-term. Also, the previous method where human performed according to a manual is being replaced by automatic correction system.

Sang-gwon: For overlay management, we see an improvement, though. In the past, confirming any issues was possible at the state of mass production, but nowadays, thanks to the big data-driven system, we can figure them out beforehand. Also, overlay modeling, which once required direct measurement, can be done virtually now, helping us save time and improve the overlay management at the same time.

 

Q. What’s the atmosphere of the team like?

Sang-gwon: The fab runs 24 hours a day and accordingly, the workload is never light. This work can’t be done if without mutual consideration and support. The overall work environment is steadily improving thanks to a better system for cooperation and flexibility of the work coordination.

“Attractive Challenges…Stacking Layers of Experiences”

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Q. Please tell us about your job.

Seung-ho Lee, TL at Icheon DRAM Scanner Photo Technology team: Of the two main tasks of the scanner photo technology team, I am in charge of the process-related part. I analyze all the data generated from the process and the equipment and predict their impacts to finally find solutions.

Jae-won Lee, TL at Icheon DRAM Scanner Photo Technology team: I’m involved in the task of improving the scanner equipment. I focus on how to improve the productivity of the equipment, operate the equipment better and potential improvements of other key components including the photo wafer tables.

 

Q. Could you introduce some competencies required for the work?

Seung-ho: Ability to understand the data flow and predict a likely outcome is particularly important for the scanner photo-related work. Reading the correlation between the source data coming from the equipment and the response data is also important. Take the scanner, for example. A single wafer goes through various processes and tools during the photo process, so, you should pay a lot of attention on how equipment operation process affects the patterning.

Jae-won: This job requires a massive volume of knowledge ranging from optics, materials, chemistry, machinery to production & manufacturing engineering. Ability and willingness to learn related work extensively beyond your area is important.

 

Q. What challenges have you faced and how did you overcome?

Seung-ho, Jae-won: It is sometimes difficult to understand the invisible nano-scale world and solve the issues with technology. Meeting two contradictory core values at the same time is challenging, but interesting. For example, increasing production output and improving quality could be conflicting, but you should be able to meet them all. ‘I’m wanted because it’s difficult to solve’ is the mindset I try to keep whenever I encounter challenges.

 

Q. What are the fascinating aspects of your work?

Seung-ho: Being able to control the micro-processing of 1 to 2 nm levels itself is fascinating. We often say, in a joke, that controlling the overlay of 2 nm on a 300 mm wafer might be like intercepting a 0.0025 mm target by a fighter jet flying at Mach 3 speed.

Jae-won: The more experience and knowledge you accumulate over time, the greater influence you’ll have on your work. It is also great to touch a broader range of work than others and have more opportunities to indirectly experience various fields through cooperation. Above all, the experience of dealing with hundreds of equipment and people is something you could hardly expect from other teams.

 

1Resolution: The ability to distinguish two adjacent objects as two different items; the higher the resolution, the finer the exposure equipment can form a circuit pattern.
2Overlay: Alignment status of the top-to-bottom alignment of stacked circuit patterns