“It always seems impossible until it’s done.” This famous quote from Nelson Mandela underlines the importance of continually overcoming seemingly unsurmountable challenges to achieve a goal, an approach which is essential to succeed in the rapidly evolving semiconductor sector.
As industry standards are consistently updated, semiconductor companies are tasked with finding the necessary technical solutions to comply with these criteria. SK hynix has a long track record in this area, as recently exemplified by its ability to meet the increased speed standards for the latest GDDR1 graphics DRAM, GDDR7.
1Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.
This episode of Rulebreakers’ Revolutions will focus on how the company’s design and technical innovations coupled with cross-departmental collaboration enabled it to develop the industry-leading GDDR7 with the highest levels of speed.
The Mission: Finding Technical Solutions to Meet GDDR7 Speed Standards
Traditionally used in graphics and gaming, GDDR DRAM is now applied to a broader range of fields including AI, high-performance computing (HPC), and autonomous driving. This is due to its parallel processing capability and advanced specifications such as high speed and power efficiency which have increased with each generation.
To satisfy increased industry speed standards for GDDR7, SK hynix derived key design and technical innovations
The standards for GDDR memory are set by the Joint Electron Device Engineering Council (JEDEC), the global standardization body for the microelectronics industry. These include ever-increasing speed requirements, progressing for example from GDDR5’s data rate of 5–10 gigabits per second (Gbps) per pin to GDDR6’s speed of 14–20 Gbps. For GDDR7, JEDEC set a target data rate range of 24 –32 Gbps, placing additional pressure on semiconductor companies to adapt to meet the latest specifications.
One of the main changes in the GDDR7 standards to facilitate these rapid speeds was the introduction of a new signaling interface. For the first time in a JEDEC standard for DRAM products, GDDR7 called for the use of the innovative PAM2 method for high frequency operations. Unlike the traditional NRZ3 interface which uses two levels to transmit data, the new PAM3 system employs three levels, enabling a higher data transmission rate for improved performance.
2Pulse amplitude modulation (PAM): A signaling process that encodes a continuous analog signal into discrete analog pulses by representing the signal’s amplitude as a binary number at a specific time.
3Non-return-to-zero (NRZ): A simple signaling interface which sends information over two levels of a signal. As the name suggests, the signal does not return to zero during between bits.
By using three levels to transmit data, PAM3 offers faster data transmission rates than the two-level NRZ interface
To support the required rapid data rate specifications and PAM3 interface, GDDR7 products needed to incorporate several new cutting-edge technologies and design innovations. In addition to these technical challenges, SK hynix also had to overhaul the testing approach it used for GDDR6. During these tests, the company faced difficulties in ensuring the same performance in real-world system environments as it achieved in the device testing phase.
Tasked with devising technological innovations and rethinking its testing approach, SK hynix tapped into its design knowhow, company-wide expertise, and well-established ability to take on new challenges.
Design Innovations, Collaboration, & New Testing Approach to Reach Speed Goals
SK hynix drew from its experience developing GDDR6 and embraced cross-departmental collaboration for GDDR7, enhancing several key design elements and integrating advanced technologies to hit the product’s ambitious speed targets.
In a company-first for a mass-produced DRAM product, SK hynix integrated a T-coil4 inductor following multiple tests and evaluations to optimize its metal layers. T-coils improve signal integrity by mitigating high-frequency losses, thereby expanding the data eye margin5 and facilitating reliable high-speed data transfer.
4T-coil: An inductive circuit commonly used in analog and radio frequency electronics to improve signal integrity and overall circuit performance.
5Data eye margin: The safety buffer within a digital signal’s eye diagram, a representation of signal integrity, that ensures reliable data transmission in high-speed communication systems.
SK hynix derived several design innovations to attain GDDR7’s increased speed standards
SK hynix also implemented an established and robust write clock (WCK) framework, a high-speed clock signal dedicated to data input and output operations. This design allows for precise timing control for data transfers, resulting in higher data rates. To maintain stable data transmission at high speeds, the company also increased the number of heat-dissipating substrate layers from four to six and applied EMC6 as the packaging material to reduce thermal resistance.
6Epoxy Molding Compound (EMC): An essential material for semiconductor packaging that seals chips to protect them from water, heat, and shock damage.
As part of efforts to improve its testing environment and ensure consistent performance, the company put together a specialized taskforce. This team established an evaluation, analysis, and management environment that could ensure consistency between simulation results and actual system implementation. Additionally, the taskforce outlined key design parameters to secure characteristics in system environments and developed circuit schemes for high-speed operation.
Regarding PAM3 testing, SK hynix first confirmed the feasibility of PAM3 operation by producing a test chip. Moreover, the company needed a solution to test PAM3 on existing mass-produced devices which use NRZ signaling. Through collaboration with related departments and test working group activities, the company carried out functional verification and mass production testing of PAM3 using NRZ signaling equipment. This enabled SK hynix to extend GDDR7’s multi-level I/O verification capabilities without requiring completely new testing infrastructure.
Aside from innovations related to improving speed or integrating PAM3 signaling, SK hynix also secured a competitive edge in power efficiency for its GDDR7 by supporting heterogeneous power modes. Through this advancement which allowed the product to function at lower voltages, the company was able to achieve significant power savings.
Redefining Standards in Speed & Power Efficiency
Boasting a rapid data rate and data processing speed, the GDDR7 offers industry-leading specifications
As a result of its strong internal collaboration, ability to overcome technological obstacles, and previous GDDR experience, SK hynix was able to develop the industry-leading GDDR7 in July 2024. The groundbreaking product achieved an industry-leading data rate of 32 Gbps—over 60% faster than the previous generation—which can rise to up to 40 Gbps depending on the circumstances.
When adopted for high-end graphics cards, SK hynix’s GDDR7 offers a data processing speed of more than 1.5 TB per second, equivalent to processing 300 Full HD movies each with a capacity of 5 GB, in a second. Overall, the product offers a 74% reduction in thermal resistance compared with the previous generation.
In addition to improved speed and heat dissipation, SK hynix enhanced the product’s power efficiency by more than 50% compared with the previous generation. This is particularly crucial to ensure GDDR7 can maintain its high performance for demanding applications such as AI while minimizing energy consumption.
These performance breakthroughs position SK hynix’s GDDR7 as the world’s highest-spec GDDR7. The development ensured SK hynix not only advanced the product’s characteristics but also established high-speed features that will benefit other DRAM products, such as mobile memory, bolstering its leadership in high-speed solutions.
Rulebreaker Interview: Jinyoup Cha, Graphic Design
The SK hynix Newsroom spoke with Jinyoup Cha, team leader of Graphic Design, a team in the DRAM Design department responsible for designing graphic DRAMs, to learn more about the company’s innovative approach to GDDR development. Having led the design of GDDR7, Cha is well-positioned to discuss the challenges of continually improving speed characteristics and the goals for next-generation GDDR memory.
As the generations of DRAM products advance, JEDEC’s standard requirements for speed have increased significantly. What do you see as the biggest obstacle in achieving such continuous speed improvements?
“In ensuring speed characteristics, there are limitations to achieving this solely through design schemes. It can only be accomplished when the latest technological elements—such as devices, specifications, testing, and packaging—are integrated with design innovations.
“The most challenging aspects are continuously monitoring market requirements and preemptively defining the technologies that need to be developed. Regarding the latter point, it is essential to prepare the necessary fundamental technologies through collaboration with related departments.”
As a team leader, what areas do you focus on to encourage your team to consistently embrace creativity and surpass limitations?
“To achieve the given objectives, I focus on setting a direction through discussions with team members and boldly pursuing new tasks. No matter how many challenges are on the road ahead, we see them as an opportunity for us to sharpen our skills and redefine our limits.
“In particular, since new tasks cannot be handled solely by the design team, it is necessary to collaborate with related departments. Therefore, I strive to create an environment where team members can voluntarily cooperate with other departments.”
As SK hynix prepares to develop next-generation GDDR products, could you briefly introduce the goals or direction that your department aims to address?
“We aim to maintain our position as the leader in the graphics memory market in terms of technological competitiveness. Along with the expansion of the graphics market, we plan to achieve the No. 1 market share through superior product competitiveness, thereby contributing to company growth.”
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