SK hynix’s Kangwook Lee Becomes First South Korean to Win IEEE EPS’ Electronics Manufacturing Technology Award

By May 31, 2024 No Comments

Kangwook Lee is the first South Korean to receive IEEE EPS’ Electronics Manufacturing Technology Award


Kangwook Lee, head of Package Development at SK hynix, has become the first South Korean to receive the Electronics Manufacturing Technology Award from the IEEE1 Electronics Packaging Society (EPS) Awards Program.

Lee was presented with his award for 2024 at the annual ceremony hosted by EPS, a technical society of IEEE, on May 30 in Denver, Colorado. First presented in 1996, the Electronics Manufacturing Technology Award recognizes outstanding achievements in the field of electronic and semiconductor packaging.

In explaining the selection of Lee, EPS highlighted his various contributions at global academic institutions and within the semiconductor industry for over 20 years. These contributions include research and development in 3D packaging2 and integrated circuits, which led to the development of the AI memory HBM3 and advancement in its manufacturing technology.

1Institute of Electrical and Electronics Engineers (IEEE): Based in the U.S., IEEE is the most prestigious professional association for electrical engineering, electronics engineering, and other related disciplines.
23D packaging: A packaging method that vertically connects chips, allowing data to be sent and received directly between the chips. Through silicon-via (TSV) is one of the more well-known 3D packaging methods.
3High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).

An expert in semiconductor packaging technology, Lee received his Ph.D. from Japan’s Tohoku University in 2000 after completing his thesis on “Three-dimensional Integration Technology for Integrated Micro-Systems”. He later worked as a postdoctoral researcher at Rensselaer Polytechnic Institute in the U.S. before returning to Tohoku University as a professor. Since joining SK hynix in 2018, he has been in charge of wafer-level package (WLP) development and has been developing packaging technology for HBM products.

In particular, Lee successfully introduced a packaging technology called MR-MUF4 during the development of the third generation of HBM—HBM2E—in 2019. This development helped cement SK hynix’s dominance in the HBM market and its position as the leading AI memory provider.

4Mass Reflow-Molded Underfill (MR-MUF): A process technology that injects protective material to harden the spaces between stacked semiconductor chips to protect the circuitry. It is more efficient than laying down a film-like material after each chip stack while also effective at dissipating heat.

“I am very pleased to receive this award which officially recognizes SK hynix’s outstanding achievements in the HBM field,” said Lee. “As the AI era gets into full swing, advanced packaging technology is becoming an increasingly important solution. Going forward, SK hynix will continue to drive technological innovations in the age of AI.”

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